1. Field of the Invention
The present invention relates to an image sensing apparatus using a photoelectric conversion element having a photoelectric charge storage region in which a potential is controlled by a capacitor.
An image sensing apparatus according to the present invention is applicable to image input devices, workstations, digital copying machines, wordprocessors, bar code readers, and automatic focusing photoelectric conversion object detection devices for cameras, video cameras, 8-mm movie cameras, and the like.
2. Description of the Prior Art
Research on photoelectric conversion devices and in particular on solid state sensors is concentrated on CCD and MOS devices.
In a CCD sensor, a potential well is formed below a MOS capacitor electrode. A charge generated upon reception of light is stored in the well. During readout, the potential wells are sequentially operated by pulses applied to the electrodes, and the stored charges are transferred to an output amplifier. The CCD sensor therefore has a relatively simple structure, generates low noise, and allows image sensing at low illuminances.
The operation principle of a MOS sensor is as follows. Upon reception of light, charges are stored in photodiodes of p-n junctions constituting light-receiving sections. During readout, MOS switching transistors connected to the respective diodes are sequentially read out to an output amplifier. Therefore, a MOS sensor has a more complex structure than a CCD sensor. However, a MOS sensor can have a high storage capacity and wide dynamic range.
The two types of conventional sensors described above have the following drawbacks, which have prevented further improvement in resolution.
A CCD sensor has the following drawbacks. (1) Since a MOS amplifier is formed on a chip as an output amplifier, 1/f noise is generated from the interface between the Si and the silicon oxide film, thus interfering with normal display. (2) When the number of cells is increased and cells are integrated at a high speed in order to provide high resolution, the maximum charge amount which can be stored in a single potential well is reduced and a wide dynamic range cannot be obtained. (3) Since a CCD sensor has a structure wherein stored charges are transferred, if even a single cell fails the transferred charges stop at the failed cell. Thus, manufacturing yield is low.
A MOS sensor has the following drawbacks. (1) Since a wiring capacitance is connected to each photodiode, a large signal voltage drop occurs when a signal is read out. (2) Wiring capacitance is large, and random noise is easily generated. (3) Fixed pattern noise tends to become mixed in due to variations in the parasitic capacitance of a scanning MOS switching transistor. Hence, image sensing at low illuminances cannot be performed. When cells are reduced in size in order to allow high resolution, stored charges are reduced. However, since the wiring capacitance is not decreased very much, the S/N ratio is reduced.
Neither CCD nor MOS sensors, therefore, can provide high resolution. As a result, a semiconductor image sensing apparatus of a new type has been proposed (Japanese Laid-Open Patent Gazettes Nos. 150878/1981, 157073/1981 and 165473/1981). In an apparatus of this type, a charge generated upon light reception is stored in a control electrode (e.g., the base of a bipolar transistor, or the gate of an electrostatic induction transistor (SIT) or a MOS transistor). The stored charge is read out by charge amplification using the amplifying function of each cell. With this apparatus, high output, wide dynamic range, low noise, non-destructive read out, and high resolution can be provided.
However, this apparatus is based on an X-Y address system. In addition, each cell has a basic structure wherein an amplification element such as a bipolar transistor or an SIT transistor is coupled to a conventional MOS cell. These factors have limited improvements in resolution.
In an image sensing element capable of non-destructive read out, the width of wiring for X-Y addressing must be minimized in order to guarantee a certain opening rate of the element. For this reason, the wiring capacitance is low, and the gain of the image sensing element is limited.
As shown in FIG. 15A, in a conventional edge compensation circuit an edge emphasized signal as shown in FIG. 15B is obtained using 1H delay lines 60 and 61, adders 63, 65, and 66, a coefficient circuit 64, and a level adjustment resistor 67.
However, two expensive delay lines must be used, and the circuit configuration becomes complex.
In FIG. 15B, charts a to d show waveforms of signals in odd fields; d', an output from the adder 65 in even fields; d", an edge signal of a frame image; and e", an edge emphasized signal of a frame image.
When dust or the like is mixed in the manufacturing line for conventional photoelectric conversion devices, a white or black defect is formed in the corresponding portion, thereby impairing image quality.
In view of this problem, various defect correction methods have been conventionally proposed. For example, the defective pixel positions of each photoelectric conversion device are detected and stored in a ROM (read-only memory). When the signal is read out, a correction signal is generated to replace the corresponding signal, thereby correcting the defective pixel signal.
With this method, however, a 1h delay line is required to perform the above-mentioned correction, and the circuit configuration becomes complex.